International Conference Paper:
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Paper Title (use style: paper title) Pin-Geng Zeng, Cheng-Hung Lin*, and Pei-Hsuan Chen, “Combined SCF and SCAN algorithms for soft-output polar decoding,” in Proc. IEEE Int. Conf. Consumer Electronics(ICCE), Las Vegas, U.S.A., pp. 1-3, 5-9 January 2024. (EI)
- Cheng-Hung Lin*, Chih-Hsuan Yu, Jia-Kang Wang, and Tzu-Lun Huang, “Cross-platform automated detection of multiple eye diseases on optical coherence tomography,” in Proc. Int. Automatic Control Conf. (CACS), Penghu, Taiwan, pp. 1-2, 26-29 October 2023.
- Himajah Natarajan, Jie-Yi Ji, Cheng-Hung Lin*, Aadhitiyan Sridharan, Cheng-Kai Lu, Jia-Kang Wang, and Tzu-Lun Huang, “Implementation of extreme learning machine algorithm for age-related macular degeneration detection on OCT volumes,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), Pingtung, Taiwan, pp. 1-2, 17-19 July 2023. (EI)
- Yi Kang Wang, Kai Wen Koh, Cheng-Kai Lu*, and Cheng-Hung Lin, “Retinal layer and fluid segmentation with transformer based architecture,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), Pingtung, Taiwan, pp. 1-2, 17-19 July 2023. (EI)
- Pei Hsuan Chen, Min-Jung Sung, and Cheng-Hung Lin*, “Stage-stopped belief propagation decoding for polar codes,” in Proc. IEEE Int. Conf. Consumer Electronics (ICCE), Las Vegas, U.S.A., pp. 1-4, 6-8 January 2023.(EI)
- Jie-Yi Ji, Hong-Yu You, Hsu-Ting Wei, Yu-Heng Liu, Cheng-Hung Lin*, Cheng-Kai Lu, Jia-Kang Wang, Tzu-Lun Huang, “Using combinational system of machine learning and deep learning to detect age-related macular degeneration,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), Taipei, Taiwan, pp. 1-2, 6-8 July 2022. (EI)
- Heng-Chi Hsu, Cheng-Hung Lin*, Cheng-Kai Lu, Jia-Kang Wang, Tzu-Lun Huang, “A Lightweight CNN net for AMD detection using OCT volumes,” in Proc. IEEE Int. Conf. Consumer Electronics (ICCE), Virtual Online, pp. 1-4, 7-9 January 2022. (EI; 1st Place Best Paper Award)
- Yao-Wen Yu, Cheng-Hung Lin*, Cheng-Kai Lu, Jia-Kang Wang, Tzu-Lun Huang, “Distinct feature labeling methods for SVM-based AMD automated detector on 3D OCT volumes,” in Proc. IEEE Int. Conf. Consumer Electronics (ICCE), Virtual Online, pp. 1-5, 7-9 January 2022. (EI)
- Chih-Heng Cheng and Cheng-Hung Lin*, “Hybrid BP-SC/SCF decoding for polar codes,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), Penghu, Taiwan, pp. 1-2, 15-17 September 2021. (2 pages; MOST 109-2221-E-155-006 and MOST 108-2221-E-155-046; EI)
- Hong-Yu You, Hsu-Ting Wei, Cheng-Hung Lin*, Jie-Yi Ji, Yu-Heng Liu, Cheng-Kai Lu, Jia-Kang Wang, and Tzu-Lun Huang, “An AMDOCT-NET for automated AMD detection under evaluations of different image size, denoising and cropping,” in Proc. IEEE Eurasia Conf. Biomedical Engineering, Healthcare and Sustainability (ECBIOS), Tainan, Taiwan, pp. 138-142, May 2021. (EI)
- Chih-Hao Yang and Cheng-Hung Lin*, “Combined architectures of denoising filter and local binary patterns feature extraction,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 209-210, Kobe, Japan, Oct. 2020. (EI)
- Chen-Xuan Wang and Cheng-Hung Lin*, “Improved normalized probabilistic minimum summation algorithm for LDPC decoding,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), Taoyuan, Taiwan, pp. 1-2, Sept. 2020. (EI)
- Cheng-Hung Lin*, Cheng-Chieh Hong, and Ching-Wen Hsieh, “Parity-enhanced double-binary turbo decoder for iterative detection and decoding receivers,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 534-535, Osaka, Japan, Oct. 2019. (Excellent Poster Award, Gold Prize)
- Hsin-Hao Su, Tang-Syun Chen, and Cheng-Hung Lin, “Reconfigurable check node unit design of dual-standard LDPC decoding for 60 GHz wireless local area network,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), pp. 1-2, Yilan, Taiwan, May 2019. (EI)
- Cheng-En Ko, Po-Han Chen, Wei-Ming Liao, Cheng-Kai Lu, Cheng-Hung Lin, and Jing-Wen Liang, “Using a cropping technique or not: impacts on SVM-based AMD detection on OCT images,” in Proc. IEEE Int. Conf. Artificial Intelligence Circuits and Systems (AICAS), pp. 199-200, Hsinchu, Taiwan, March 2019. (EI)
- Cheng-Hung Lin and Jin-Kun Shen, “Dual-mode channel decoding kernel design using FBA-based layered LDPC decoding,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 181-182, Nara, Japan, Oct. 2018. (EI; Paper Award Candidate)
- Xiaolong Ma, Cheng-Hung Lin, and Tao Jin, “Phase difference algorithm and its FFT implementation for high-accuracy power system frequency monitoring,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), pp. 477-478, Taichung, Taiwan, May 2018. (EI)
- Yan-Zhang Huang, Cheng-Hung Lin, and Shu-Yen Lin, “Operation-reduced enumeration technique for soft-input soft-output iterative sphere decoding,” in Proc. IEEE Int. Conf. Applied System Innovation (ICASI), pp. 1196-1198, Chiba, Japan, April 2018. (EI)
- Shu-Yen Lin, Jin-Yi Lin, and Cheng-Hung Lin, “Cycle-accelerated simulation for three-dimensional near-data processing system with power, temperature, and latency analysis,” in Proc. IEEE Int. Conf. Applied System Innovation (ICASI), pp. 124-126, Chiba, Japan, April 2018. (EI)
- Ching-Wen Hsieh and Cheng-Hung Lin, “VLSI implementations of parallel dual-mode MAP decoding for iterative detection and decoding receiver,” in Proc. The 32nd Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 217-219, Busan, Korea, July 2017. (Best Paper Award)
- Yan-Zhang Huang, Yu-Horng Hsieh, and Cheng-Hung Lin, “A flexible K-best sphere decoding kernel for configurable antennas and constellations,” in Proc. IEEE Int. Conf. Consumer Electronics-Taiwan (ICCE-TW), pp. 115-116, Taipei, Taiwan, June 2017. (EI)
- Chen Pei Song, Cheng-Hung Lin, and Shu-Yen Lin, “Partially-stopped probabilistic min-sum algorithm for LDPC decoding,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 135-136, Kyoto, Japan, Oct. 2016. (EI)
- Shu-Yen Lin, Jin-Yi Lin, and Cheng-Hung Lin, “A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 107-108, Kyoto, Japan, Oct. 2016. (EI; Excellent Paper Award, 2nd Prize)
- Cheng-Hung Lin, Chih-Hsuan Chiang, Shu-Wei Guo, and Shu-Yen Lin, “An enhanced single-binary turbo decoding scheme for turbo MIMO systems,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 537-538, Osaka, Japan, Oct. 2015. (EI)
- Shu-Yen Lin, Cheng-Hung Lin, and Ho-Yun Su, “Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 277-278, Osaka, Japan, Oct. 2015. (EI)
- Shu-Yen Lin, Cheng-Hung Lin, and Ho-Yun Su, “Thermal-aware kernel mapping for three-dimensional multi-mode channel decoding,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 630-631, Tokyo, Japan, Oct. 2014. (EI)
- Yuan-Syun Wu, Cheng-Hung Lin, and Shu-Yen Lin, ”Ultra-low complexity early termination scheme for layered LDPC decoding,” in Proc. IEEE Global Conf. Consumer Electronics (GCCE), pp. 711-712, Tokyo, Japan, Oct. 2014. (EI)
- Tzu-Hsuan Huang, Cheng-Hung Lin, and Shu-Yen Lin, “Efficient check-node-stopped LDPC decoder design,” in Proc. IEEE Int. Symp. Consumer Electronics (ISCE), pp. 274-275, Jeju, Korea, June 2014. (EI)
- Shu-Yen Lin, and Cheng-Hung Lin, and Ho-Yun Su, “Thermal-aware task mapping for reconfigurable channel decoding,” in Proc. IEEE Int. Symp. Bioelectronics and Bioinformatics (ISBB), pp. 1-4, Taoyuan, Taiwan, April 2014. (EI)
- Shu-Wei Guo and Cheng-Hung Lin, “Decoding performance of parallelly stopped turbo decoding for LTE rate matching scheme,” in Proc. Int. Conf. Electronics, Information and Communication (ICEIC), pp. 199-200, Kota Kinabalu, Malaysia, Jan. 2014.
- Shin-An Chou and Cheng-Hung Lin, “QC-LDPC codec design for DSRC Systems with implementation on FPGA board,” in Proc. The 28th Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 1082-1083, Yeosu, Korea, July 2013.
- Shu-Wei Guo and Cheng-Hung Lin, “Decision comparison of window-stopped turbo decoding for LTE system,” in Proc. The 28th Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 679-680, Yeosu, Korea, July 2013.
- Tzu-Hsuan Huang, Cheng-Hung Lin, Shin-An Chou, and Shu-Wei Guo, “Efficient check nodes stopping technique for MSA-based LDPC decoding,” in Proc. The 28th Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 675-678, Yeosu, Korea, July 2013.
- Li-An Ou, Chih-Chia Wei, Kuang-Yi Hsu, and Cheng-Hung Lin, “Kernel-stopped parallel turbo decoding for HomePlug Green PHY systems,” in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APC-CAS), pp. 45-48, Kaohsiung, Taiwan, Dec. 2012. (EI)
- Chih-Shiang Yu and Cheng-Hung Lin, “Area-efficient radix-4 SISO architecture design for multi-standard turbo/LDPC decoding,” in Proc. The 27th Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 1469-1472, Sapporo, Japan, July 2012.
- Chih-Chia Wei and Cheng-Hung Lin, “Window-stopped double-binary turbo decoding based on bit-level detection,” in Proc. The 27th Int. Tech. Conf. Circuits/Systems, Computers, and Communications (ITC-CSCC), pp. 1465-1468, Sapporo, Japan, July 2012.
- Cheng-Hung Lin, En-Jui Chang, Chun-Yu Chen, and An-Yeu Wu, “A 0.16nJ/bit/iteration 3.38mm2 turbo decoder chip for WiMAX/LTE standards,” in Proc. IEEE Int. Symp. Integrated Circuits (ISIC), pp. 178-181, Singapore, Dec. 2011.
- Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu Wu, “A 52-mW 8.29mm2 19-mode LDPC decoder chip for mobile WiMAX applications,” in Proc. ACM/IEEE Asia and South Pacific Design Automation Conf. (ASP-DAC), pp. 121−122, Yokohama, Japan, Jan. 2009. (EI)
- Chun-Yu Chen, Cheng-Hung Lin, and An-Yeu Wu, “High-throughput dual-mode single/double binary MAP processor design for wireless WAN,” in Proc. IEEE Workshop on Signal Processing Systems (SiPS), pp. 83−87, DC, USA, Oct. 2008.
- Cheng-Hung Lin, Chun-Yu Chen, and An-Yeu Wu, “Low-power traceback MAP Decoding for double-binary convolutional turbo decoder,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), pp. 736−739, Seattle, USA, May 2008. (EI; High Quality Paper Selected in Special Issue of IEEE TCAS-I )
- Cheng-Hung Lin, Chun-Yu Chen, and An-Yeu Wu, “High-throughput 12-Mode CTC decoder for WiMAX standard,” in Proc. IEEE Int. Symp. VLSI Design, Automation, and Test (VLSI-DAT), pp. 216-219, Hsinchu, Taiwan, April 2008. (EI; Best Student Paper Award Candidate)
- Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu Wu, "A 19-mode 8.29mm2 52-mW LDPC decoder chip for IEEE 802.16e system," in Proc. Int. Symp. VLSI Circuits (VLSIC), pp. 16−17, Tokyo, Japan, June 2007. (EI)
- Fan-Min Li , Cheng-Hung Lin, and An-Yeu Wu, “A new early termination scheme of iterative turbo decoding using decoding threshold,” in Proc. IEEE Workshop on Signal Processing Systems (SiPS), pp. 89-94, Banff, Canada, Oct. 2006. (EI)
- Cheng-Hung Lin, Fan-Min Li , and An-Yeu Wu, “A unified convolutional/turbo kernel design based on triple-mode MAP/VA timing analysis,” in Proc. Int. PhD Student Workshop on SoC (IPS),Taipei, Taiwan, July 2006.
- Cheng-Hung Lin, Fan-Min Li , Xin-Yu Shih, and An-Yeu Wu, “A triple-mode MAP/VA IP design for advanced wireless communication systems,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), pp. 221−224, Hsinchu, Taiwan, Nov. 2005. (EI; Selected Paper for the A-SSCC Press Release)
- Tsung-Han Tsai and Cheng-Hung Lin, "A VLSI design of new memory reduction turbo code decoder," in Proc. The 9th IEEE Int. Workshop on Cellular Neural Networks and Their Applications (CNNA), pp. 249−252, Tainan, Taiwan, May 2005. (EI)
- Tsung-Han Tsai, Cheng-Hung Lin, and An-Yeu Wu, “A memory-reduced log-Map kernel for turbo decoder,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 2, pp. 1032−1035, Kobe, Japan, May 2005. (EI)
- Tsung-Han Tsai and Cheng-Hung Lin, “A low complexity channel estimation algorithm and architecture design in turbo codes with early termination techniques,” in Proc. The IEEE 6th Circuits and Systems Symp. Emerging Technologies: Frontiers of Mobile and Wireless Communication (MWC), vol. 1, pp. 213−214, Shanghai, China, May 2004. (EI)
- Tsung-Han Tsai and Cheng-Hung Lin, “A new memory-reduced architecture design for log-MAP algorithm in turbo decoding,” in Proc. The IEEE 6th Circuits and Systems Symp. Emerging Technologies: Frontiers of Mobile and Wireless Communication (MWC), vol. 2, pp. 607−610, Shanghai, China, May 2004. (EI)
- Tsung-Han Tsai, Cheng-Hung Lin, and Shin-Yo Lin, “Low complexity algorithm and architecture design for channel estimation in turbo code,” in Proc. The 46th IEEE Int. Midwest Symp. Circuits and Systems (MWSCAS), vol. 3, pp. 27−30, Cairo, Egypt, Dec. 2003. (EI)